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ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 0 ? revision history revision description issue date rev. 1.0 initial issue a ug.28.2005 rev. 1.1 revised i sb1 ll/lli-lle(max)= 50/100 a => 12/30 a mar.30.2006 rev. 1.2 a dded sl spec. no v .2.2007 rev. 1.3 revised typos in features ma y .6.2008 rev. 1.4 revised i sb1 /i dr(max.) added i sb1 /i dr values when t a = 25 and t a = 40 revised features & ordering information lead free and green package available to green package available added packing type in ordering information revised v term to v t1 and v t2 deleted t solder in absolute maximun ratings mar.30.2009 rev. 1.5 revised package outline dimension in page 10/11/12/13 ma y .7.2010 rev. 1.6 revised ordering information in page 14 a ug.30.2010 rev. 1.7 deleted e grade a ug.9.2011 rev. 1.8 revised pin configuration in page 2 apr.06.2012
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 1 ? features ? fast access time : 35/55/70ns ? low power consumption: operating current : 12/10/7ma (typ.) standby current : 1 a (typ.) ll-version 0.8 a (typ.) sl-version ? single 2.7v ~ 5.5v power supply ? all outputs ttl compatible ? fully static operation ? tri-state output ? data retention voltage : 1.5v (min.) ? green package available ? package : 32-pin 450 mil sop 32-pin 600 mil p-dip 32-pin 8mm x 20mm tsop-i 32-pin 8mm x 13.4mm stsop 36-ball 6mm x 8mm tfbga general description the ly62w1024 is a 1,048,576-bit low power cmos static random ac cess memory organized as 131,072 words by 8 bits. it is fabricated using very high performance, high reliability cmos technology. its standby current is stable within the range of operating temperature. the ly62w1024 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. the ly62w1024 operates from a single power supply of 2.7v ~ 5.5v and all inputs and outputs are fully ttl compatible product family product family operating temperature vcc range speed power dissipation standby(i sb1, typ.) operating(icc,typ.) ly62w1024 0 ~ 70 2.7 ~ 5.5v 35/55/70ns 1 a(ll)/0.8a(sl) 12/10/7ma ly62w1024(i) -40 ~ 85 2.7 ~ 5.5v 35/55/70ns 1 a(ll)/0.8a(sl) 12/10/7ma functional block diagram decoder i/o data circuit control circuit 128kx8 memory array column i/o a0-a16 vcc vss dq0-dq7 ce# we# oe# ce2 pin description symbol description a0 - a16 address inputs dq0 ? dq7 data inputs/outputs ce#, ce2 chip enable inputs we# write enable input oe# output enable input v cc power supply v ss ground nc no connection
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 2 ? pin configuration ps: all pin out definition are relative with ?lyontek logo? orientation.
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 3 ? absolute maximun ratings* parameter symbol rating unit voltage on v cc relative to v ss v t1 -0.5 to 6.5 v voltage on any other pin relative to v ss v t2 -0.5 to v cc +0.5 v operating temperature t a 0 to 70(c grade) -40 to 85(i grade) storage temperature t stg -65 to 150 power dissipation p d 1 w dc output current i out 50 ma *stresses greater than those listed under ?absolute maximum ratings ? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to the absolute maximum rating conditions for extended period may affect device reliabil ity. truth table mode ce# ce2 oe# we# i/o operation supply current standby h x x x high-z i sb1 x l x x high-z i sb1 output disable l h h h high-z i cc ,i cc1 read l h l h d out i cc ,i cc1 write l h x l d in i cc ,i cc1 note: h = v ih , l = v il , x = don't care.
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 4 ? dc electrical characteristics parameter symbol test condition min. typ. * 4 max. unit supply voltage v cc 2.7 3.0 5.5 v input high voltage v ih *1 0.7*vcc - v cc +0.3 v input low voltage v il *2 - 0.2 - 0.6 v input leakage current i li v cc R v in R v ss - 1 - 1 a output leakage current i lo v cc R v out R v ss , output disabled - 1 - 1 a output high voltage v oh i oh = -1m a 2.4 2.7 - v output low voltage v ol i ol = 2m a - - 0.4 v average operating power supply current i cc cycle time = min. ce# = v il and ce2 = v ih , i i/o = 0ma other pins at v il or v ih - 35 - 12 80 m a - 55 - 10 60 m a - 70 - 7 50 m a i cc1 cycle time = 1 s ce# = 0.2v and ce2 R v cc -0.2v, i i/o = 0ma other pins at 0.2v or v cc - 0.2v - 1 10 ma standby power supply current i sb1 ce# v R cc -0.2v or ce2 Q 0.2v others at 0.2v or v cc - 0.2v ll - 1 15 a lli - 1 30 a sl * 5 sli *5 25 - 0.8 2 a 40 - 1 2 a sl - 0.8 7 a sli - 0.8 10 a notes: 1. v ih (max) = v cc + 3.0v for pulse width less than 10ns. 2. v il (min) = v ss - 3.0v for pulse width less than 10ns. 3. over/undershoot specifications are characterized, not 100% tested. 4. typical values are included for reference only and are not guaranteed or tested. typical values are measured at v cc = v cc (typ.) and t a = 25 5. this parameter is measured at v cc = 3.0v
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 5 ? capacitance (t a = 25 , f = 1.0mhz) parameter symbol min. ma x unit input capacitance c in - 6 pf input/output capacitance c i/o - 8 pf note : these parameters are guaranteed by devic e characterization, but not production tested. ac test conditions input pulse levels 0.2v to v cc -0.2v input rise and fall times 3ns input and output timing reference levels 1.5v output load c l = 50pf + 1ttl, i oh / i ol = -1ma/2m a ac electrical characteristics (1) read cycle parameter sym. ly62w1024-35 ly62w1024-55 ly62w1024-70 unit min. max. min. max. min. max. read cycle time t rc 35 - 55 - 70 - ns a ddress access time t aa - 35 - 55 - 70 ns chip enable access time t ace - 35 - 55 - 70 ns output enable access time t oe - 25 - 30 - 35 ns chip enable to output in low-z t clz * 10 - 10 - 10 - ns output enable to output in low-z t olz * 5 - 5 - 5 - ns chip disable to output in high-z t chz * - 15 - 20 - 25 ns output disable to output in high-z t ohz * - 15 - 20 - 25 ns output hold from address change t oh 10 - 10 - 10 - ns (2) write cycle parameter sym. ly62w1024-35 ly62w1024-55 ly62w1024-70 unit min. max. min. max. min. max. write cycle time t wc 35 - 55 - 70 - ns a ddress valid to end of write t aw 30 - 50 - 60 - ns chip enable to end of write t cw 30 - 50 - 60 - ns a ddress set-up time t as 0 - 0 - 0 - ns write pulse width t wp 25 - 45 - 55 - ns write recovery time t wr 0 - 0 - 0 - ns data to write time overlap t dw 20 - 25 - 30 - ns data hold from end of write time t dh 0 - 0 - 0 - ns output active from end of write t ow * 5 - 5 - 5 - ns write to output in high-z t whz * - 15 - 20 - 25 ns *these parameters are guaranteed by device characterization, but not production tested.
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 6 ? timing waveforms read cycle 1 (address controlled) (1,2) dout data valid t oh t aa address t rc previous data valid read cycle 2 (ce# and ce2 and oe# controlled) (1,3,4,5) dout data valid t oh oe# high-z high-z t clz t olz t oe t chz t ohz ce2 t ace ce# t aa address t rc notes : 1.we# is high for read cycle. 2.device is continuously selected oe# = low, ce# = low ., ce2 = high . 3.address must be valid prior to or coincident with ce# = low , ce2 = high; otherwise t aa is the limiting parameter. 4.t clz , t olz , t chz and t ohz are specified with c l = 5pf. transition is measured 500mv from steady state. 5.at any given temperature and voltage condition, t chz is less than t clz , t ohz is less than t olz.
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 7 ? write cycle 1 (we# controlled) (1,2,3,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw t wr t as (4) t ow ce# t aw address t wc ce2 write cycle 2 (ce# and ce2 controlled) (1,2,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw ce# t wr t as t aw address t wc ce2 notes : 1.we#, ce# must be high or ce2 must be low during all address transitions. 2.a write occurs during the overlap of a low ce#, high ce2, low we#. 3.during a we#controlled write cycle with oe# low, t wp must be greater than t whz + t dw to allow the drivers to turn off and data to be placed on the bus. 4.during this period, i/o pins are in the out put state, and input signals must not be applied. 5.if the ce#low transition and ce2 high transit ion occurs simultaneously with or after we# low transition, the outputs remain i n a high impedance state. 6.t ow and t whz are specified with c l = 5pf. transition is measured 500mv from steady state.
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 8 ? data retention characteristics parameter symbo l test condition min. typ. max. unit v cc for data retention v dr ce# v R cc -0.2vor ce2 Q 0.2v 1.5 - 5.5 v data retention current i dr v cc = 1.5v ce# v R cc - 0.2v or ce2 Q 0.2v other pins at 0.2v or v cc -0.2 v ll - 0.5 12 a lli - 0.5 30 a sl sli 25 - 0.4 2 a 40 - 0.5 2 a sl - 0.4 5 a sli - 0.4 8 a chip disable to data retention time t cdr see data retention waveforms (below) 0 - - ns recovery time t r t rc * - - ns t rc * = read cycle time data retention waveform low vcc data retention waveform (1) ( ce# controlled) vcc ce# v dr R 1.5v ce# v R cc-0.2v vcc(min.) v ih t r t cdr v ih vcc(min.) low vcc data retention waveform (2) (ce2 controlled) vcc ce2 v dr R 1.5v ce2 Q 0.2v vcc(min.) v il t r t cdr v il vcc(min.)
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 9 ? package outline dimension 32 pin 450 mil sop package outline dimension unit sym. inch.(base) mm(ref) a 0.120(max) 3.048(max) a1 0.004(min) 0.102(min) a2 0.116(max) 2.946(max) b 0.016(typ) 0.406(typ) c 0.008(typ) 0.203(typ) d 0.817(max) 20.75(max) e 0.445 0.006 11.303 0.152 e1 0.555 0.025 14.097 0.635 e 0.050(typ) 1.270(typ) l 0.033 0.017 0.838 0.432 l1 0.055 0.008 1.397 0.203 s 0.026(max) 0.660(max) y 0.004(max) 0.101(max) 0 o -10 o 0 o -10 o
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 10 ? 32 pin 600 mil p-dip package outline dimension note : d/e1/s dimension do not include mold flash. unit sym. inch(base) mm(ref) a1 0.015(min) 0.381(min) a2 0.155 0.005 3.937 0.127 b 0.018 0.005 0.457 0.127 d 1.650 0.01 41.910 0.254 e 0.600 0.010 15.240 0.254 e1 0.545 0.005 13.843 0.127 e 0.100(typ) 2.540(typ) eb 0.650 0.020 16.510 0.508. l 0.158 0.043 4.013 1.092 s 0.075 0.010 1.905 0.254 q1 0.070 0.005 1.778 0.127
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 11 ? 32 pin 8mm x 20mm tsop-i package outline dimension unit sym. inch(base) mm(ref) a 0.047 (max) 1.20 (max) a1 0.004 0.002 0.10 0.05 a2 0.039 0.002 1.00 0.05 b 0.009 0.002 0.22 0.05 c 0.006 0.002 0.155 0.055 d 0.724 0.008 18.40 0.20 e 0.315 0.008 8.00 0.20 e 0.020 (typ) 0.50 (typ) hd 0.787 0.008 20.00 0.20 l 0.024 0.004 0.60 0.10 l1 0.0315 0.004 0.08 0.10 y 0.003 (max) 0.08 (max) 0 o 5 o 0 o 5 o
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 12 ? 32 pin 8mm x 13.4mm stsop package outline dimension unit sym. inch(base) mm(ref) a 0.049 (max) 1.25 (max) a1 0.004 0.002 0.10 0.05 a2 0.039 0.002 1.00 0.05 b 0.009 0.002 0.22 0.05 c 0.006 0.002 0.155 0.055 d 0.465 0.008 11.80 0.20 e 0.315 0.008 8.00 0.20 e 0.020 (typ) 0.50 (typ) hd 0.528 0.008 13.40 0.20. l 0.02 0.008 0.50 0.20 l1 0.031 0.005 0.8 0.125 y 0.003 (max) 0.076 (max) 0 o 5 o 0 o 5 o
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 13 ? 36 ball 6mm 8mm tfbga package outline dimension
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 14 ? ordering information
ly62w1024 rev. 1.8 128k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 15 ? this page is left blank intentionally.

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